Question: When powered On, the PSoC pulls the I2C lines LOW for a brief period. Sometimes, this results in a I2C bus error condition. What is the reason for this glitch and what is the workaround to avoid this glitch?
Answer: The I2C SDA and SCL lines are configured as Open Drain Low in the boot.asm after the call to LoadConfigInit function. When the pins are configured as Open Drain Low, the PRT1DR register bits still control the SDA and SCL pins. The default value of the PRTxDR register bits is 0 and this results in the SDA and SCL lines pulled low. In main.c or main.asm when the I2C resource is started, the SDA and SCL lines get connected to the internal I2C hardware and are pulled back to the default HIGH state. The brief time the lines stay low may cause false start conditions or bus error on the I2C bus. There are two workarounds to avoid this behavior.
Workaround - 1:
Open the boot.tpl and write a 1 to the PRT1DR bits that correspond to the I2C pins before the call to the LoadConfigInit function. If P1[0] and P1[1] are configured as I2C pins, write 0x03 to PRT1DR. Write 0xA0 to PRT1DR if P1[5] and P1[7] are configured as I2C pins. When the drive mode of the I2C pins get configured to Open Drain Low in the LoadConfigInit function, the 1's in the PRT1DR register will keep the SDA and SCL lines HIGH. Below is an example code for the boot.tpl with P1[5] and P1[7] configured as I2C lines.
;-------------------------
; Load Base Configuration
;-------------------------
; Load global parameter settings and load the user modules in the
; base configuration. Exceptions: (1) Leave CPU Speed fast as possible
; to minimize start up time; (2) We may still need to play with the
; Sleep Timer.
;
mov reg[PRT1DR], 0xA0
lcall LoadConfigInit
When the project is built, the boot.asm is generated from boot.tpl and hence the change made to boo.tpl will reflect in the boot.asm file. Remember, when the PSoC Designer is upgraded to a higher version, the boot.tpl may get replaced in the project and the custom modification will be lost. Add a comment in main.asm or main.c as a reminder about the change.
Workaround - 2:
After placing the I2C user module and selecting the I2C pins, the PSoC Designer will automatically set the drive mode of the pins to Open Drain Low. Change the drive mode of the pins back to HighZ Analog.
In the beginning of main.c or main.asm, write a 1 to the PRT1DR register bits and then configure the pins as HighZ Analog by writing to the PRT1DMx registers. Below is the example code for P1[5] and P1[7] configured as I2C Lines. For P1[0] and P1[1], change the values written to PRT1DR and PRT1DMx registers to 0x03.
Assembly code:
mov reg[PRT1DR], 0xA0
or reg[PRT1DM2], 0xA0
or reg[PRT1DM1], 0xA0
or reg[PRT1DM0], 0xA0
C code:
PRT1DR |= 0xA0;
PRT1DM2 |= 0xA0;
PRT1DM1 |= 0xA0;
PRT1DM0 |= 0xA0;
Due to this modification, the SDA and SCL lines will remain in HighZ Analog drive mode and the external Pull Up resistors will keep the lines HIGH. The advantage of this workaround is that there is no need for custom boot.tpl modification and this will work even if the PSoC Designer is upgraded.