Saturday, 14 November 2009 01:51
M. Ganesh Raaja
Question: What are Reset mode and Power Cycle mode of Programming? When should I use them?
Answer: In the power cycle mode, the programmer applies VDD to the target PSoC device and within a specified time frame sends some commands to the PSoC over the ISSP SCLK and SDATA lines and puts it into programming mode. In the Reset mode, the programmer generates a reset on the XRES pin of the PSoC and sends the commands within a time frame to put the PSoC into programming mode. Refer Application note AN2026A - In-System Serial Programming (ISSP) Protocol for details on the Acquire Device phase.
Power cycle mode of programming can be used to program any PSoC device. There are a few points to remember while using the Power cycle mode.
- When the device is programmed in power cycle mode, the programmer supplies VDD to the PSoC. Any circuit connected to the PSoC's VDD will also be powered by the Programmer and will draw power from the Programmer. Care should be taken in not exceeding the Programmer's current limit.
- If the target board has components working on 3.3V or below and if the Programmer is capable of only 5V (for example, the CY3210 MiniProg1 programmer), this will damage the components on the board. Under such situation Reset programming has to be used.
In Reset mode, the target PSoC should be initially supplied with VDD and the programming should be initiated. If VDD is not supplied to PSoC, the programmer will not be able to acquire the target. Reset mode is not possible on PSoC devices without the XRES pin (for example 8 pin PSoC devices). For these devices use Power cycle mode.
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Friday, 13 November 2009 15:06
M. Ganesh Raaja
Question: What is the CalcTime parameter in an ADCINCVR? How do I set this value?
Answer: Refer the block diagram of ADCINCVR shown below.
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Friday, 13 November 2009 15:00
M. Ganesh Raaja
Question: What is the ClockPhase parameter in the ADC? How do I set this?
Answer: The output of a Switch Capacitor block is not a continuous signal. SC blocks have two phases of operation. Phase-1 is the charge acquisition phase when the input signal is sampled. During this phase, the output of the SC block is 0. Phase-2 is the charge transfer phase when the acquired charge is transferred to the output and the output is proportional to the ratio of input and output switch capacitor cell values. So, the output of the SC block is valid only during Phase-2. Application Note “AN2041 - Understanding Switched Capacitor Blocks” is a very good source of information on this subject.
If an ADC’s input is connected to the output of another SC Block,
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