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Usually PWMs are used for applications like Motor control, LED control etc.  A PWM (Pulse Width Modulator) has a variable pulse width, where the width of the pulse can be varied from 0 to 100% of its period.  In the PSoC, a conventional PWM has a simple down counter and a compare register.  When the value in the Count register is less than or equal to the Compare register the Compare output goes high.  The pulse width of the PWM can be varied by changing the value in the Compare register.  The waveform of a conventional PWM operating at 50% duty cycle and its spectrum plot are shown below.

This is a Getting Started Video for PSoC Designer IDE. The video shows how to create a PSoC project to measure an analog signal and display the result on the LCD and also to configure a 16 bit PWM for a 1Hz output to blink an LED. The project is tested using the CY3210 evaluation board from Cypress.  Watch the video below...

Question: I would like to have a digital block running when the PSoC is in Sleep mode.  How do I do this?Answer: When PSoC is in Sleep mode, the IMO is switched Off.  Because of this the SysClk will not be functional.  As all the clock dividers VC1, VC2 and VC3 have SysClk as their source, these clocks cannot be used as the clock source to the digital block that has to be running when the PSoC is in sleep mode.  There are only two clock options.  The first is the internal 32KHz oscillator.  This clock is active even when PSoC is in sleep mode and hence can be used as the clock source to the digital block.  The 32KHz will work even if an External Crystal Oscillator is used.The second option is to use an external clock signal as the clock input to the digital block.  The external clock can be connected to the digital block through the Global Input and Row Input nets.Another important thing to remember is the ClockSync parameter.  As the SysClk is off when the PSoC is in Sleep mode, the ClockSync parameter of the digital block should be set to UnSynchronized.  If the digital block is connected to an external clock source, then the Clock Synchronization on the Row Input net should also be disabled.  Following is the procedure to disable the clock synchronization on the Row Input.Click on the small square box at the beginning of the Row Input net.This opens the Digital Interconnect Row_x_Input_x window.Click on the small square box after the Input Mux and select Async.  This will disable the clock synchronizer on the Row input net.

Question: What is the ClockSync parameter in the PSoC1 digital user modules?  How do I select the value?Answer: The clock for all digital blocks can be selected from 1 of 16 sources.  The possible sources are SysClk, SysClk*2, VC1, VC2, VC3, Comparator buses, Row inputs and other digital blocks.  To manage clock skew and ensure that the interfaces between blocks meet timing in all cases, all digital block input clocks must be resynchronized to either SYSCLK or SYSCLK*2, which are the source clocks for all the PSoC device clocking.  There are 4 different synchronization options.

Question: What is the difference between Counter and PWM user modules in PSoC1?Answer: In hardware, there is no difference between a Counter and a PWM.  Both are implemented by configuring a digital block as a counter.  The difference is only in the name of the user modules and the APIs.  In PWM, the APIs are named with respect to the functions of a PWM and in Counter, the APIs are named after functions of a Counter.  You can implement a PWM by placing a Counter user module and bringing out the Compare Out signal of the counter.  The pulsewidth may be modified by calling the Counter_WriteCompareValue API which is the same as the WritePulseWidth API of a PWM.