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// Start USB for 5V operation and wait till enumeration is completeUSBFS_Start(0, USB_5V_OPERATION);while(!USBFS_bGetConfiguration());// Load the IN endpoint with data with no toggleUSBFS_LoadInEP(1, Data, 8, USB_NO_TOGGLE);while(1)Above code shows the general program flow when using an USBFS user module to send data to the PC using an IN Endpoint.  If you notice, the USBFS_LoadInEP function call before the while loop uses “USB_NO_TOGGLE” and the call inside the while loop uses “USB_TOGGLE”.  What is this TOGGLE and NO_TOGGLE?  What is the significance of these constants?  I can understand from the above code that the first time I call the USBFS_LoadInEP function, I have to use NO_TOGGLE option and TOGGLE for further transactions.  Why is it so?  These are some of the questions a first time user of USB faces.

Question: How do I set the Baud Rate of the UART component in PSoC3?Answer: There are two ways to set the Baud Rate of the UART component.Option-1: Using the Standard Baud RatesWhen the "Internal Clock" option is enabled in the Advanced tab in the UART component configuration window, the UART configuration window has a drop down list with standard baud rates from 110bps to 921.6kbps.  The baud rate for the UART can be selected from this list.  When this option is used, the PSoC Creator automatically sets the Clock source for the UART component. The below figure shows the screen shot of Baud Rate selection using standard baud rates.

Question: I have the PSoC operating as an I2C Slave (or Master) with a VDD of 3.3V.  It is connected to an external I2C Master (or Slave) operating at 5V.  Which voltage should the Pull Up resistors on the SCL and SDA lines be connected?Answer: Preferably, the pull up resistors should be connected to 3.3V.  This will ensure that the PSoC's GPIOs operate at the same voltage as that of VDD. The pull up resistors can also be connected to the 5V.  Under this condition, the internal clamping diodes (refer GPIO cell diagram below) in the GPIO of the PSoC will limit the voltage on the SDA and SCL lines to (3.3V + Diode Voltage).  The pull up resistors will also act as current limits which will limit the current through the clamping diodes.  Design the Pull up resistors in such a way that the current through the internal clamping diodes is less than 5mA.  This is applicable only when the SDA and SCL lines of the other I2C device are also configured as Open Drain mode.

When using the UART component in the PSoC, the most important parameter for the UART is the clock.  The user module data sheet says the clock to the UART should be 8x the baud clock.  So, for a 9600 baud rate, the clock to the UART should be 8 x 9600 = 76.8KHz.In the PSoC, this clock has to be derived from the SysClk or SysClk * 2.  Let us take SysClk for this case and assume a SysClk of 24Mhz.  To get a frequency of 76.8KHz from 24MHz, the required divider is 312.5.  Unfortunately, we cannot have a fraction in the divider and have to round off to 312 or 313. For a divider of 312, the resulting clock is 76.923KHz.  This gives rise to a plethora of questions.  Is this clock accurate enough?  Will I get bit errors because of the deviation in the clock?  What is the maximum tolerance allowed in the clock to UART?Before we get into the answer to the question, let us first derive the maximum error allowed in the UART clock.  Picture below shows the UART RX line and the internal 8x clock.  The UART data transfer starts with a Start bit, 8 data bits, optional parity bit and ends with a Stop bit.

Question: When using UART on CY8C24x94, following DRC warning is generated:“UART should not be used in the CY8C24x94 devices without connection to the USB bus”.Why is this error generated? What should I do if I do not need to connect to the USB bus?Answer: For a UART to work, the error on the clock should be <4%. Both the receiver and transmitter contribute to this error and hence, the clock on the PSoC should not exceed 2% tolerance.  Generally, PSoC devices have an IMO with a tolerance of 2.5%.  But for the CY8C24x94 device, the tolerance is 4%.  So, if the UART clock on the other end of PSoC also has some error, there will be communication errors.  When the USB is used, the IMO is synced with the USB bus clock and becomes very accurate and will prevent any UART errors.  The warning is generated to inform this condition.  There are a few options to follow under this situation.1. Use an accurate External clock with a tolerance of <2% on P1.4 for the SysClk2. If the device at the other end of the UART is driven by a crystal osciallator and does not contribute to the error budget, PSoC can use the 4% error budget and you may not have any problem in the communication. But this is still not a recommended solution.3. Send only 4 bits at a time on the UART.  As the clock tolerance affects only the bits farthest from the start bit, transmitting only 4 bits at a time will prevent bit errors.  The first 4 bits of a UART frame should be the data bits and the next 4 bits should 1's.  So, to send 0x59, you would send 0xF5 first and 0xF9 next. 4. If you are not planning to use the USB, then consider using other family of PSoC devices that have 2.5% tolerance on the IMO.  You could try the CY8C27x43 or the CY8C29x66 families/All things said, the PSoC IMO is trimmed using a trim register in the boot.asm file.  This will increase the accuracy of the clock to atleast <2%.  So, if the PSoC is operating under very normal temperature conditions, you may not get any error at all.  But this approach is definitely risky.

This example project demonstrates using the high level UART User module APIs how to receive and decode a command string with parameters.  A command string with parameters is transmitted from hyperterminal and the project receives and decodes the string and echoes back the command and the parameters.  Use the below link to download the project and documentation from Cypress website.Example Project - UART

Question: How should I select the clock to PSoC 3 UART?  What is the relationship between baud rate and the clock and what are the accuracy requirements?Answer: There are two main points to consider while setting the clock to the UART component.1. When the external clock option is selected for the UART component, the clock should be 8 times the baud rate.  For example:For a baud rate of 19.2kbps, the clock should be 153.6KHz For a baud rate of 115.2kbps, the clock should be 921.6KHzWhen internal Clock option is selected, the PSoC Creator automatically configures the clock input to the UART based on the baud rate selected.2. The tolerance for the UART clock for error free communication is about 4%.  The IMO provides 1% tolerance at 3MHz and 2% tolerance at 6MHz.  So, the clock to the UART may be generated from 3MHz or 6MHz IMO.  The IMO can also be passed through the PLL and can form the clock source for the UART.

Question: What is the address range that can be used for the EzI2Cs slave user module?Response: When the ROM register parameter is disabled in the EzI2Cs user module, the address range is 0-127.  In this mode, the external Master can read or write only to RAM buffers in the I2C Slave.  When the ROM register option is enabled, the address range is be 0-63.  In this mode, the external Master can read constant values in ROM buffers.   The 7th bit of the address is now used to differentiate between the RAM and ROM access.   For example, if the address parameter is set to 10 (0x0A), the Master can access the RAM registers using address 0x0A and the ROM registers using address 0x4A.

Question: What is the significance of the CPU_Clk_Speed parameter in I2CHW user module?  What should be the criteria for selecting the value for the parameter?

Answer:  The Silicon RevA of the CY27x43 family, with a suffix "A" in the part number (for example CY8C27443A - 24PVXI), had some limitations for the CPU speed while accessing the I2C_CFG, I2C_SCR and I2C_MSCR registers.  Details of the restrictions may be found in the Silicon Errata for CY8C27x43 RevA, found here.

Question:  How do I calculate the clock input to an UART, TX8 or RX8 user module for a given baud rate?  What are the various clock sources that can be used to clock an UART, TX8 or RX8?

Answer: The clock to the UART, TX8 and RX8 modules should be 8 times that of the baud rate.  For example, the clock for a baud rate of 9600 should be 76.8KHz.  As the PSoC is very flexible in terms of clock sources, an UART, TX8 or RX8 can be clocked by VC1, VC2, VC3, SysClk, SysClk*2 as clock source.  Alternately, another digital block may also be used as a clock source.