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When using the UART component in the PSoC, the most important parameter for the UART is the clock.  The user module data sheet says the clock to the UART should be 8x the baud clock.  So, for a 9600 baud rate, the clock to the UART should be 8 x 9600 = 76.8KHz.In the PSoC, this clock has to be derived from the SysClk or SysClk * 2.  Let us take SysClk for this case and assume a SysClk of 24Mhz.  To get a frequency of 76.8KHz from 24MHz, the required divider is 312.5.  Unfortunately, we cannot have a fraction in the divider and have to round off to 312 or 313. For a divider of 312, the resulting clock is 76.923KHz.  This gives rise to a plethora of questions.  Is this clock accurate enough?  Will I get bit errors because of the deviation in the clock?  What is the maximum tolerance allowed in the clock to UART?Before we get into the answer to the question, let us first derive the maximum error allowed in the UART clock.  Picture below shows the UART RX line and the internal 8x clock.  The UART data transfer starts with a Start bit, 8 data bits, optional parity bit and ends with a Stop bit.

Question: How many Clock components can I use in a PSoC 3 design?Answer: PSoC 3 has eight digital clock dividers and four analog clock dividers.  When a Clock component is dragged into the design and "Clock Type" is set to "New", depending on whether the clock is used for a digital or analog peripheral, PSoC creator will use a digital or analog clock divider.  So, if the Clock Type is set to New, we can have eight digital Clock components and four analog Clock components.

Question: How should I select the clock to PSoC 3 UART?  What is the relationship between baud rate and the clock and what are the accuracy requirements?Answer: There are two main points to consider while setting the clock to the UART component.1. When the external clock option is selected for the UART component, the clock should be 8 times the baud rate.  For example:For a baud rate of 19.2kbps, the clock should be 153.6KHz For a baud rate of 115.2kbps, the clock should be 921.6KHzWhen internal Clock option is selected, the PSoC Creator automatically configures the clock input to the UART based on the baud rate selected.2. The tolerance for the UART clock for error free communication is about 4%.  The IMO provides 1% tolerance at 3MHz and 2% tolerance at 6MHz.  So, the clock to the UART may be generated from 3MHz or 6MHz IMO.  The IMO can also be passed through the PLL and can form the clock source for the UART.