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This projects shows how to measure multiple Analog inputs using the Analog Mux and Delta Sigma ADC components in PSoC3. The results are displayed both on an LCD and transmitted to a PC using the UART component. The results can be observed using Hyperterminal. The project can be tested using the CY8CKIT-001 PSoC3 Development Kit from Cypress Semiconductors.
Question: What is the ClockPhase parameter in the ADC? How do I set this?Answer: The output of a Switch Capacitor block is not a continuous signal. SC blocks have two phases of operation. Phase-1 is the charge acquisition phase when the input signal is sampled. During this phase, the output of the SC block is 0. Phase-2 is the charge transfer phase when the acquired charge is transferred to the output and the output is proportional to the ratio of input and output switch capacitor cell values. So, the output of the SC block is valid only during Phase-2. Application Note “AN2041 - Understanding Switched Capacitor Blocks” is a very good source of information on this subject.If an ADC’s input is connected to the output of another SC Block,
This is a Getting Started Video for PSoC Designer IDE. The video shows how to create a PSoC project to measure an analog signal and display the result on the LCD and also to configure a 16 bit PWM for a 1Hz output to blink an LED. The project is tested using the CY3210 evaluation board from Cypress. Watch the video below...
Question: When I change the input to a Delta Sigma ADC, the result is corrupted. What is the reason for this? What are the various factors to be considered while multiplexing the input to a Delta Sigma ADC?Answer: The Delta Sigma ADC is a pipe-lined ADC. The output is valid only on the second ADC result. If there is no change in the input signal, all the subsequent results are valid.
Question: What are DNL and INL Errors in an ADC? Is there anyway to compensate these errors?Answer:DNL - Differential Non-Linearity: For an ideal ADC the output is divided into 2 power n uniform steps each with the width Δ. Any deviation from the ideal step width is the Differential Non-Linearity (DNL). It is expressed as counts. DNL is a function of each ADC's particular architecture.
INTRODUCTIONMost if not all of the microcontroller designs that involve analog signal processing will require an ADC to convert an analog signal into a digital value that can be processed by the CPU. PSoC 1 has a vast selection of ADCs that can be used depending on the application, ADCINC, ADCINCVR, ADCINC14, DELSIG8, DELSIG11, DelSig to name a few. Most of the users, beginners to experts face some or other problem while using an ADC like ADC not completing the conversion, ADC result always zero, ADC result incorrect etc. Below are Five Golden Rules that will help you to tame the PSoC 1 ™ ADC.
Question: I am using the Delta Sigma ADC in the single ended mode to measure an input voltage starting from VSS (0-1.024V, 0-2.048V etc). When the input is 0V, the output of the ADC goes to near full scale. What is the cause for this and what is the solution?Answer: The single ended ADC is nothing but a differential ADC implementation where the sign is ignored. When the offset voltage of the ADC is +ve, there will be no problem in measurement and the ADC result will be above 0x0000 when input is 0V. But when the ADC offset is negative, the otuput of the ADC produces a -ve result and when sign bit is ignored, the result is a positive number which is near full scale voltage. For example if the input offset is equal to -3 counts of ADC result, the signed result from a 24 bit decimator would be 0xFFFFFD. The MSB of this 24 bit result is dropped and the lower 16 bits are returned as unsigned result. Now, the result is 0xFFFD which is equal to 65533 in unsigned value.
This video shows how to create a PSoC3 project to measure +/-1.024V signal and display on LCD. Step by step instructions on PSoC creator are provided. The project is tested on the CY8CKIT-001 development board from Cypress Semiconductors. Best viewed full screen |
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