planetpsoc.com

Question: Where can I find BSDL files for PSoC3 and PSoC5?Answer: The BSDL files for PSoC3 and PSoC5 can be found under the following link from Cypress website.BSDL Files for PSoC3 and PSoC5

Question: Is it possible to create a Voltage Controlled Oscillator in PSoC3 / PSoC5 using the PSoC3/PSoC5 hardware?Answer: Yes.  With a handful of hardware components, it is possible to create a voltage controlled oscillator in PSoC3 / PSoC5.  The schematic of a voltage controlled oscillator is shown below.

This projects shows how to measure multiple Analog inputs using the Analog Mux and Delta Sigma ADC components in PSoC3.  The results are displayed both on an LCD and transmitted to a PC using the UART component.  The results can be observed using Hyperterminal.  The project can be tested using the CY8CKIT-001 PSoC3 Development Kit from Cypress Semiconductors.

Question: How do I set the Baud Rate of the UART component in PSoC3?Answer: There are two ways to set the Baud Rate of the UART component.Option-1: Using the Standard Baud RatesWhen the "Internal Clock" option is enabled in the Advanced tab in the UART component configuration window, the UART configuration window has a drop down list with standard baud rates from 110bps to 921.6kbps.  The baud rate for the UART can be selected from this list.  When this option is used, the PSoC Creator automatically sets the Clock source for the UART component. The below figure shows the screen shot of Baud Rate selection using standard baud rates.

Many times we may want to connect a multiple wired hardware bus to another multiple wired bus, or a Status / Control register or to multiple GPIO pins. This video shows how to achieve multiple wire hardware bus connections in the Schematic Editor in PSoC Creator.

Question: How do I find out the resource usage in a PSoC3 or PSoC5 project?Answer: The % of resources used in the PSoC3 or PSoC5 design may be found in the .rpt file in the Results tab of the Workspace Explorer. 

Question: How do I bring out the VDAC8 output in PSoC 3?  Can I connect the VDAC8 output directly to a pin?Answer: VDAC8 in PSoC3 is implemented by using and IDAC and an internal Load resistance of 16K for 4V range and 4K for 1V range.  Following is the block diagram.

Question: How do I create a High Resolution DAC in PSoC 3?Answer: A High Resolution DAC in PSoC3 may be created by using Dithering.Dithering is a widely used technique in Digital Processing where a noise is intentionally introduced into a system to increase the resolution of the system.  Say we have an 8 bit DAC with a full scale value of 255mV.  Each count of the DAC represents 1mV.  What if we wanted an output of 1.25mV from the DAC.  Switch the DAC output between 1mv and 2mV keeping the output at 2mV 25% of the time and 1mV 75% of the time, the average value of the output would be 1.25mV.  For an output of 1.5mV, the DAC output should be maintained at 2mV for 50% of the time and 1mV 50% of the time.  See diagram below.

Question: How many Clock components can I use in a PSoC 3 design?Answer: PSoC 3 has eight digital clock dividers and four analog clock dividers.  When a Clock component is dragged into the design and "Clock Type" is set to "New", depending on whether the clock is used for a digital or analog peripheral, PSoC creator will use a digital or analog clock divider.  So, if the Clock Type is set to New, we can have eight digital Clock components and four analog Clock components.

Question: How should I select the clock to PSoC 3 UART?  What is the relationship between baud rate and the clock and what are the accuracy requirements?Answer: There are two main points to consider while setting the clock to the UART component.1. When the external clock option is selected for the UART component, the clock should be 8 times the baud rate.  For example:For a baud rate of 19.2kbps, the clock should be 153.6KHz For a baud rate of 115.2kbps, the clock should be 921.6KHzWhen internal Clock option is selected, the PSoC Creator automatically configures the clock input to the UART based on the baud rate selected.2. The tolerance for the UART clock for error free communication is about 4%.  The IMO provides 1% tolerance at 3MHz and 2% tolerance at 6MHz.  So, the clock to the UART may be generated from 3MHz or 6MHz IMO.  The IMO can also be passed through the PLL and can form the clock source for the UART.